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Psion Organiser II Top Slot (D) The 8 Bit Latch.
An Example of Interfacing.

Now we have looked at all the considerations associated with interfacing to the Top slot let us attempt to create a programme that will do this.

The Hardware.

In this example an 8 bit latch has been created to interface with the Top slot (fig 1) It comprises of one 74HC373 8 bit latch, and a 74HC00 quad 2 input nand gate. In this example the outputs of the latch are un-continued but in its simplest form this latch could represent a piece of test equipment with LCD attached to the 8 outputs.

The Software.

An Assembler program to write to this latch must observe all of the rules that we have previously stated.
The write sequence should be as follows:

NB Waiting for a key press normally turns slots off.

Sample Program to Write to the 8 Bit Latch.

Data to write is passed in Accumulator B.

psh b ;save data
lda b,#3 ;select Top slot
os pk$setp ;and turn on power
oim CS3,POB_PORT6 ;deselect Top slot
oim OE,POB_PORT6 ;set SOE high
oim ^xFF,POB_DD2 ;set port 2 to output
pul b ;restore data
sta b,POB_PORT" ;Output data on port 2
aim ^C<CS3>,POB_PORT6 ;take SS3 low
OIM CS3,POB_PORT6 ;take SS3 high
aim 0,POB_DDR2 ;set port 2 to input
aim ^C<OB>,POB_PORT6 ;take SOB low.

 

Location Mnemonic Address
Port 6 Data register Pob_port6 $17
Port 2 Data register Pob_port2 $03
Port 2 Data direction Register Pob_DDR2 $01

 Example 8 bit latch circuit

Fig 1.

Top Slot (D) Index page

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